Changeset 20

Timestamp:

05/12/08 04:22:16 (2 years ago)

Author:

amirh

Message:

 

Location:

XilinxTools

Files:

• xilinx_compile.py (modified) (7 diffs)
• xst.py (added)
• xst_io.py (added)
• xst_logparse.py (added)
• XST_virtex5_run.xlsx (added)

XilinxTools/xilinx_compile.py

@@ -1 @@
-run, runXST, runNGDBuild, runMAP, runPAR, runBitgen = True, False, False, False, False, True
-
+run, runXST, runNGDBuild, runMAP, runPAR, runBitgen = True, True, True, True, True, True
+getXDL = True
 import os
 import subprocess
@@ -15 +15 @@
 XilinxBin = os.path.join(XilinxPath,'bin\\nt')
 
+
+tmp_dir = "tmp"
+hdp_dir = "xst"
+       
 syn_param = """
 #
@@ -84 +88 @@
 
 """% locals()
-
-tmp_dir = "tmp"
-hdp_dir = "xst"
-
 #Generate XST file
 xst_file = open("%s.xst"%topmodule, mode='w')
@@ -156 +156 @@
 
 
-
+class XSTFile:
+    def __init__(self,name):
+        if os.path.exists(name):
+            self.File = open(name)
+        
+
+class Synthesizer:
+    def __init__(self):
+        self.xst_path = os.path.join(XilinxBin,"xst")
+        self.XST_Attr_Map = {}
+        
+        self.InputFileName
+        self.XST_Attr        
+        self.InputFormat
+
+        
+    def Run(self):
+        RunReq = [self.xst_path,"-ifn", "%s.xst"%topmodule, "-ofn", "%s_xst_log.syr"%topmodule]
+        print "Invoking Synthesis Tool: " + RunReq
+        self.retcode = subprocess.call(RunReq)
+ 
+def LogPrint(Port,File):
+    ln = Port.readline()
+    print ln
+    File.write(ln)
+    
+#todo: define classes for each of the synthesis and placement files
+#create XML-RPC interface to marshal and demarshal components and invoke toolchain
 if __name__ == "__main__":
     if run:
@@ -163 +190 @@
             xst_path = os.path.join(XilinxBin,"xst")
             retcode = subprocess.call([xst_path,"-ifn", "%s.xst"%topmodule, "-ofn", "%s_xst_log.syr"%topmodule])
-
         if runNGDBuild:    
             #Invoke NGDBuild
@@ -174 +200 @@
             map_path = os.path.join(XilinxBin,"map")
             retcode = subprocess.call([map_path, '-p', part, '-cm', 'area', '-pr', 'b', '-k', '4', '-c', '100', '-tx', 'off', '-o', '%s_map.ncd'%topmodule, '%s.ngd'%topmodule, '%s.pcf'%topmodule])
-
+            if genXDL:
+                xdl_path = os.path.join(XilinxBin,"xdl")
+                retcode = subprocess.call([xdl_path,'-ncd2xdl','%s_map.ncd'%topmodule])
         if runPAR:
             #Invoke PAR
             par_path = os.path.join(XilinxBin,"par")
             retcode = subprocess.call([par_path, '-w', '-ol', 'std', '-t', '1', '%s_map.ncd'%topmodule, '%s_par.ncd'%topmodule, '%s.pcf'%topmodule])
-
+            if genXDL:
+                xdl_path = os.path.join(XilinxBin,"xdl")
+                retcode = subprocess.call([xdl_path,'-ncd2xdl','%s_par.ncd'%topmodule])
         if runBitgen:
             #Invoke Bitgen
@@ -186 +216 @@
             for opt in bit_gen_g_options:
                 bitgen_arglist.append('-g')
-                bitgen_arglist.append(opt)
+                bitgen_arglist.append('%s'%opt)
             retcode = subprocess.call(bitgen_arglist)